STMicroelectronics and NUS Launch HELIX Edge AI Corporate Lab

STMicroelectronics and the National University of Singapore (NUS) have launched the ST–NUS HELIX Corporate Lab, a four-year strategic research initiative focused on developing next-generation edge artificial intelligence hardware. The collaboration focuses on system-to-silicon innovation to enable generative and embodied AI applications directly on physical edge devices.

Context of the Cooperation
Deploying increasingly capable artificial intelligence models onto compact edge devices—such as robots, humanoids, and drones—presents significant technical hurdles in energy efficiency, memory bandwidth, latency, and integration constraints. Traditional AI architectures struggle with data movement bottlenecks between processors and off-chip memory, limiting real-time sensing, processing, and actuation in power-constrained environments.

To address these hardware limitations and accelerate industry-relevant research and development, cooperation was established between semiconductor manufacturer STMicroelectronics and the National University of Singapore. Supported under Singapore’s Research, Innovation and Enterprise 2025 (RIE2025) plan, the initiative integrates NUS’s academic research in integrated circuits, computer architecture, and AI models with ST’s expertise in advanced silicon technologies, embedded memory, and industrial chip manufacturing.

Technical Solution and Responsibilities
The technological solution centers on the HELIX (Hardware for Embodied Low-power Intelligent Xcceleration) initiative, which addresses the full chip stack from AI algorithms to silicon implementation. Responsibilities are allocated across the academic and industrial partners to align research pathfinding with semiconductor manufacturing.

National University of Singapore (NUS) hosts the facility across the College of Design and Engineering and School of Computing, leading research into AI algorithms, accelerator architectures, circuit design, and system-level modeling.

STMicroelectronics provides a dedicated design chassis built on its proprietary P18 18nm Fully Depleted Silicon On Insulator (FD-SOI) technology and embedded Phase-Change Memory (ePCM), alongside industrial engineering and technology support.

At a system level, the lab’s research architecture focuses on memory-centric configurations, in-memory computing, and scalable compute-and-memory topologies. The integration of 18nm FD-SOI with embedded phase-change memory provides dense, on-die non-volatile storage alongside SRAM hierarchies, reducing the off-chip data movement that drives energy consumption in AI workloads.

Deployment or Implementation
The four-year research initiative is hosted on the NUS campus, where the dedicated P18 FD-SOI design chassis serves as an industrial-grade foundation for developing, simulating, and validating new AI accelerator concepts without building baseline infrastructure from scratch.

The implementation roadmap focuses on prototyping and demonstrating edge AI solutions tailored for embodied applications requiring real-time multi-modal sensing and localized execution. In addition to technical IP creation and system-level validation, the HELIX Corporate Lab is structured to train engineers, researchers, and students, establishing a specialized talent pipeline to support advanced semiconductor and edge AI ecosystems in Singapore.

Edited by Romila DSilva, Induportals Editor, with AI assistance.